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? 2004 microchip technology inc. ds21876a-page 1 m MCP1650/51/52/53 features ? output power capability over 5 watts ? output voltage capability from 3.3v to over 100v ? 750 khz gated oscillator switching fr equency ? adaptable duty cycle for battery or wide-input, voltage-range applications ? input voltage range: 2.0v to 5.5v ? capable of sepic and flyback topologies ? shutdown control with i q < 0.1 a (typical) ? low operating quiescent current: i q = 120 a ? voltage feedback tolerance (0.6%, typical) ? popular msop-8 package ? peak current limit feature ? two undervoltage lockout (uvlo) options: - 2.0v or 2.55v ? operating temperature range: -40c to +125c applications ? high-power boost applications ? high-voltage bias supplies ? white led drivers and flashlights ? local 3.3v to 5.0v supplies ? local 3.3v to 12v supplies ? local 5.0v to 12v supplies ? lcd bias supply description the MCP1650/51/52/53 is a 750 khz gated oscillator boost controller packaged in an 8 or 10-pin msop package. developed for high-power, portable applica- tions, the gated oscillator controller can deliver 5 watts of power to the load while consuming only 120 a of quiescent current at no load. the MCP1650/51/52/53 can operate over a wide input voltage range (2.0v to 5.5v) to accommodate multiple primary-cell and single- cell li-ion battery-powered applications, in addition to 2.8v, 3.3v and 5.0v regulated input voltages. an internal 750 khz gated oscillator makes the MCP1650/51/52/53 ideal for space-limited designs. the high switching frequency minimizes the size of the external inductor and capacitor, saving board space and cost. the internal oscillator operates at two differ- ent duty cycles depending on the level of the input volt- age. by changing duty cycle in this fashion, the peak input current is reduced at high input voltages, reducing output ripple voltage and electrical stress on power train components. when the input voltage is low, the duty cycle changes to a larger value in order to provide full-power capability at a wide input voltage range typical of battery-powered, portable applications. the MCP1650/51/52/53 was designed to drive external switches directly using internal low-resistance mosfets. additional features integrated on the MCP1650/51/52/ 53 family include peak input current limit, adjustable output voltage/current, low battery detection and power-good indication. package types 10-pin msop ext gnd cs fb v in nc nc shdn 1 2 3 4 8 7 6 5 MCP1650 8-pin msop gnd cs fb nc pg lbo lbi shdn 2 3 4 5 9 8 7 6 mcp1653 ext v in 1 10 ext gnd cs fb v in pg nc shdn 1 2 3 4 8 7 6 5 mcp1652 8-pin msop ext gnd cs fb v in lbo lbi shdn 1 2 3 4 8 7 6 5 mcp1651 8-pin msop 750 khz boost controller
MCP1650/51/52/53 ds21876a-page 2 ? 2004 microchip technology inc. MCP1650 block diagram isns + - 1.22v 1r 9r + - + - internal osc. with 2 fixed duty cycles v high v low v duty + - v ref v in v high v low v duty dc = 80% v in < 3.8v dc = 56% v in > 3.8v v in + - voltage feedback current limit cs v in ext osc. shdn fb v ref 1.22v s r q pulse dr soft- start on/ osc. out gnd on/off control MCP1650 latch ref 0.122v off
? 2004 microchip technology inc. ds21876a-page 3 MCP1650/51/52/53 mcp1651/2/3 block diagram vin cs ext MCP1650/51/52/53 shdn gnd + - low battery comparator 1.22 vref lbi lbo + - power good comparators pg 85% of vref v in + - 115% of vref v in mcp1651 - low battery detection mcp1652 - power good indication a MCP1650 - no features mcp1651 - low battery detection mcp1652 - power good indication mcp1653 - low battery detection and pg MCP1650 v fb vref. (1.22v) mcp1653 - lbi and pg features
MCP1650/51/52/53 ds21876a-page 4 ? 2004 microchip technology inc. timing diagram typical application circuits latch truth table srq 00qn 011 100 111 osc s r q dr ext MCP1650/1/2/3 timing diagram r s q q fb cs shdn v in 8 2 5 6 4 7 MCP1650 gnd input voltage 3.3v 10% c in 10 f off on ext boost inductor 3.3 h 10 f ceramic 90.9 k ? v out = 12v i out = 0 to 100 ma 10 k ? mosfet/schottky combination device r sense 0.05 ? 3.3v to 12v 100 ma boost converter 1 3 nc nc c out
? 2004 microchip technology inc. ds21876a-page 5 MCP1650/51/52/53 1.0 electrical characteristics absolute maximum ratings ? v in to gnd........................................................... 6.0v cs,fb,lbi,lbo ,shdn ,pg,ext............ gnd ? 0.3v to v in + 0.3v current at ext pin ................................................ 1a storage temperature .......................... -65c to +150c operating junction temperature........ -40c to +125c esd protection on all pins ........................... 4kv hbm ? notice: stresses above those listed under ?maximum rat- ings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. expo- sure to maximum rating conditions for extended periods may affect device reliability. dc characteristics electrical specifications: unless otherwise noted, all parameters apply at v in = +2.7v to +5.5v, shdn =high, t j = -40c to +125c. typical values apply for v in = 3.3v, t a +25c. parameters sym min typ max units conditions input characteristics supply voltage v in 2.7 ? 5.5 v undervoltage lockout (s option) uvlo 2.4 2.55 2.7 v v in rising edge under voltage lockout (r option) uvlo 1.85 2.0 2.15 v v in rising edge undervoltage hysteresis uvlo hyst ?117? mv shutdown supply current i shd ? 0.001 1 a shdn = gnd quiescent supply current i q ? 120 220 a ext = open soft start time t ss ? 500 ? s feedback characteristics feedback voltage v fb 1.18 1.22 1.26 v all conditions feedback comparator hysteresis v hys ?1223mv feedback input bias current i fblk -50 ? 50 na v fb < 1.3v current sense input current sense threshold i sns-th 75 114 155 mv delay from current sense to output t dly_isns ?80? ns ext drive ext driver on resistance (high side) r high ?818 ? ext driver on resistance (low side) r low ?412 ? oscillator characteristics switching frequency f osc 650 750 850 khz low duty cycle switch-over voltage v lowduty ?3.8? vv in rising edge duty cycle switch voltage hysteresis dc hyst ?92? mv low duty cycle dc low 50 56 62 % high duty cycle dc high 72 80 88 %
MCP1650/51/52/53 ds21876a-page 6 ? 2004 microchip technology inc. temperature specifications shutdown input logic high input v in-high 50 ? ? % of v in logic low input v in-low ? ? 15 % of v in input leakage current i shdn ? 5 100 na shdn =v in low battery detect (mcp1651/mcp1653 only) low battery threshold lbi th 1.18 1.22 1.26 v lbi input falling (all conditions) low battery threshold hysteresis lbi thhys 95 123 145 mv low battery input leakage current i lbi ?10? nav lbi = 2.5v low battery output voltage v lbo ? 53 200 mv i lb sink = 3.2 ma, v lbi = 0v low battery output leakage current i lbo ?0.01 1 av lbi = 5.5v, v lbo = 5.5v time delay from lbi to lbo t d_lbo ?70? sl bi transitions from l bith +0.1vtol bith -0.1v power good output (mcp1652/mcp1653 only) power good threshold low v pgth-l -20 -15 -10 % referenced to feedback voltage power good threshold high v pgth-h +10 +15 +20 % referenced to feedback voltage power good threshold hysteresis v pgth-hys ? 5 ? % referenced to feedback voltage (both low and high thresholds) power good output voltage v pgout ? 53 200 mv i pg sink = 3.2 ma, v fb = 0v time delay from v fb out of regulation to power good output transition t d_pg ?85? sv fb transitions from v fbth +0.1vtov fbth -0.1v electrical specifications : unless otherwise noted, all parameters apply at v in = +2.7v to +5.5v, shdn = high, t a = -40c to +125c. typical values apply for v in = 3.3v, t a = +25c. parameters sym min typ max units conditions temperature ranges storage temperature range t a -40 ? +125 c operating junction temperature range t j -40 ? +125 c continuous thermal package resistances thermal resistance, msop-8 ja ? 208 ? c/w single-layer semi g42-88 board, natural convection thermal resistance, msop-10 ja ? 113 ? c/w 4-layer jc51-7 standard board, natural convection dc characteristics (continued) electrical specifications: unless otherwise noted, all parameters apply at v in = +2.7v to +5.5v, shdn =high, t j = -40c to +125c. typical values apply for v in = 3.3v, t a +25c. parameters sym min typ max units conditions
? 2004 microchip technology inc. ds21876a-page 7 MCP1650/51/52/53 2.0 typical performance curves note: unless otherwise indicated, v in = 3.3v, v out =12v, c in = 10 f (x5r or x7r ceramic), c out = 10 f (x5r or x7r), i out = 10 ma, l = 3.3 h, shdn > v ih , t a = +25c. figure 2-1: input quiescent current vs. input voltage. figure 2-2: input quiescent current vs. ambient temperature. figure 2-3: oscillator frequency vs. input voltage. figure 2-4: oscillator frequency vs. ambient temperature. figure 2-5: duty cycle switch-over voltage vs. ambient temperature. figure 2-6: duty cycle switch-over hysteresis voltage vs. ambient temperature. note: the graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. the performance characteristics listed herein are not tested or guaranteed. in some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. 50 75 100 125 150 175 200 2 2.5 3 3.5 4 4.5 5 5.5 6 input voltage (v) input quiescent current (a) t j = - 40c t j = +25c t j = +125c i load = 0 ma 50 75 100 125 150 175 200 -40 -25 -10 5 20 35 50 65 80 95 110 125 ambient temperature (c) input quiescent current (a) v in = 2.0v i load = 0 ma v in = 5.5v v in = 4.1v v in = 2.7v 700 720 740 760 780 800 2.7 3 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 6 input voltage (v) oscillator frequency (khz) t j = - 40c t j = +25c t j = +125c 720 740 760 780 800 820 840 -40 -25 -10 5 20 35 50 65 80 95 110 125 140 ambient temperature (c) oscillator frequency (khz) v in = 2.0v v in = 5.5v v in = 4.1v v in = 2.7v 3.75 3.76 3.77 3.78 3.79 3.80 3.81 3.82 3.83 3.84 3.85 -40 -25 -10 5 20 35 50 65 80 95 110 125 ambient temperature (c) duty cycle switch over voltage (v) v in = rising 90.0 90.5 91.0 91.5 92.0 92.5 93.0 93.5 94.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 ambient temperature (c) duty cycle switch voltage hysteresis (mv)
MCP1650/51/52/53 ds21876a-page 8 ? 2004 microchip technology inc. note: unless otherwise indicated, v in = 3.3v, vout = 12v, c in = 10 f (x5r or x7r ceramic), c out = 10 f (x5r or x7r), i out = 10 ma, l = 3.3 h, shdn > v ih , t a = +25c. figure 2-7: ext sink and source current vs. input voltage. figure 2-8: ext sink and source current vs. ambient temperature. figure 2-9: ext rise and fall times vs. external capacitance. figure 2-10: feedback voltage vs. input voltage. figure 2-11: feedback voltage hysteresis vs. input voltage. figure 2-12: dynamic load response. 0.0 0.2 0.4 0.6 0.8 1.0 2.7 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 6.0 input voltage (v) ext sink/source current (a) i sink i source t a = +25c 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 -40 -25 -10 5 20 35 50 65 80 95 110 125 ambient temperature (c) ext sink/source current (a) i sink i source v in = 3.3v 0 10 20 30 40 50 60 70 80 100 150 200 250 300 350 400 450 500 external capacitance (pf) ext rise / fall time (ns) 5v fall 2.7v rise 5v rise 2.7v fall 1.205 1.210 1.215 1.220 1.225 1.230 22.533.544.555.56 input voltage (v) v fb voltage (v) t j = - 40c t j = +25c t j = +125c 0 2 4 6 8 10 12 14 16 18 2.7 3 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 6 input voltage (v) v fb hysteresis (mv) t j = - 40c t j = +25c t j = +125c
? 2004 microchip technology inc. ds21876a-page 9 MCP1650/51/52/53 note: unless otherwise indicated, v in = 3.3v, vout = 12v, c in = 10 f (x5r or x7r ceramic), c out = 10 f (x5r or x7r), i out = 10 ma, l = 3.3 h, shdn > v ih , t a = +25c. figure 2-13: dynamic line response. figure 2-14: power-up timing (input voltage). figure 2-15: power-up timing (shutdown). figure 2-16: efficiency vs. input voltage. figure 2-17: efficiency vs. load current. figure 2-18: output voltage vs. input voltage (line regulation). 75 77 79 81 83 85 87 89 2.7 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 6.0 input votlage (v) efficiency (%) t a = 25c i out = 100 ma 60 65 70 75 80 85 90 10.0 20.0 30.0 40.0 50.0 60.0 70.0 80.0 90.0 100.0 load current (ma) efficiency (%) t a = 25c v in = 3.3v 12.10 12.11 12.12 12.13 12.14 12.15 12.16 2.7 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 6.0 input voltage (v) output voltage (v) t a = 25c i out = 100 ma
MCP1650/51/52/53 ds21876a-page 10 ? 2004 microchip technology inc. note: unless otherwise indicated, v in = 3.3v, vout = 12v, c in = 10 f (x5r or x7r ceramic), c out = 10 f (x5r or x7r), i out = 10 ma, l = 3.3 h, shdn > v ih , t a = +25c. figure 2-19: output voltage vs. output current (load regulation). figure 2-20: output voltage ripple vs. input voltage. figure 2-21: lbi threshold voltage vs. input voltage. figure 2-22: lbi hysteresis voltage vs. input voltage. figure 2-23: lbo output voltage vs. lbo sink current. figure 2-24: l bo output timing. 12.10 12.11 12.12 12.13 12.14 12.15 12.16 12.17 10 20 30 40 50 60 70 80 90 100 output current (ma) output voltage (v) v in = 3.3v t a = +25c v in = 4.3v 0.10 0.12 0.14 0.16 0.18 0.20 0.22 0.24 0.26 2.7 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 6.0 input voltage (v) v out ripple pk-pk (v) i out = 100ma t a = +25c 1.205 1.210 1.215 1.220 1.225 1.230 22.533.544.555.56 input voltage (v) lbi threshold voltage (v) t j = - 40c t j = +25c t j = +125c 120 121 122 123 124 125 126 127 128 129 22.533.544.555.56 input votlage (v) lbi hysteresis voltage (mv) t j = - 40c t j = +25c t j = +125c 0 50 100 150 200 250 0246810 lbo sink current (ma) lbo output voltage (mv) t j = - 40c t j = +25c t j = +125c
? 2004 microchip technology inc. ds21876a-page 11 MCP1650/51/52/53 note: unless otherwise indicated, v in = 3.3v, vout = 12v, c in = 10 f (x5r or x7r ceramic), c out = 10 f (x5r or x7r), i out = 10 ma, l = 3.3 h, shdn > v ih , t a = +25c. figure 2-25: pg threshold and hysteresis percentage vs. input voltage. figure 2-26: pg output voltage vs. sink current. figure 2-27: pg timing. figure 2-28: current sense threshold vs. input voltage. figure 2-29: v ext high output voltage vs. input voltage. figure 2-30: v ext low output voltage vs. input voltage. -20 -15 -10 -5 0 5 10 15 20 2.7 3 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 6 input voltage (v) pg threshold and hysteresis (% of v out ) pg th(high) t a = 25c pg th(low) pg th(hysteresis) 0 50 100 150 200 250 0246810 pg output sink current (ma) pg ouput voltage (mv) t j = - 40c t j = +25c t j = +125c 104 106 108 110 112 114 116 22.533.544.555.56 input voltage (v) current sense threshold (mv) t j = - 40c t j = +25c t j = +125c 0.0 4.0 8.0 12.0 16.0 20.0 2 2.5 3 3.5 4 4.5 5 5.5 6 input voltage (v) v ext r on high (ohms) t j = - 40c t j = +25c t j = +125c 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 22.533.544.555.56 input voltage (v) v ext r on low (ohms) t j = - 40c t j = +25c t j = +125c
MCP1650/51/52/53 ds21876a-page 12 ? 2004 microchip technology inc. 3.0 pin descriptions the descriptions of the pins are listed in table 3-1. table 3-1: pin function table 3.1 external gate drive (ext) ext is the output pin that drives the external n-channel mosfet on and off during boost operation. ext is equal to gnd for shdn or uvlo conditions. 3.2 circuit ground (gnd) connect the gnd pin to circuit ground. see layout guidelines for suggested grounding physical layout. 3.3 current sense (cs) input peak current is sensed on cs through the exter- nal current sense resistor. when the sensed current is converted to a voltage, the current sense threshold is 122 mv below v in typical. if that threshold is exceeded, the pulse is terminated asynchronously. 3.4 feedback input (fb) connect output voltage of boost converter through external resistor divider to the fb pin for voltage regulation. the nominal voltage that is compared to this input for pulse termination is 1.22v. 3.5 shutdown input (shdn ) the shdn input is used to turn the boost converter on and off. for normal operation, tie this pin high or to v in . to turn off the device, tie this pin to low or ground. 3.6 low battery input (lbi) lbi is the input pin for the low battery comparator. when the voltage on this pin falls below the nominal 1.22v threshold setting, the lbo (low battery output) open-drain is active-low. 3.7 low battery output (lbo ) lbo is an active-low, open-drain output capable of sinking 10 ma when the lbi pin is below the threshold voltage. lbo is high-impedance during shdn or uvlo conditions. 3.8 power good (pg) pg is an active-high, open-drain output capable of sinking 10 ma when the fb input pin is 15% below its typical value or more than 15% above its typical value, indicating that the output voltage is out of regulation. pg is high impedance during shdn or uvlo condition. 3.9 input voltage (v in ) v in is an input supply pin. tie 2.7v to 5.5v input power source. pin no. MCP1650 pin no. mcp1651 pin no. mcp1652 pin no. mcp1653 symbol function 1111extexternal gate drive 2222gndground 3333cscurrent sense 4444fbf eedback input 5556shdn shutdown ? 6 ? 7 lbi low battery input ?7?8lbo low battery output ? ? 7 9 pg power good output 88810v in input voltage
? 2004 microchip technology inc. ds21876a-page 13 MCP1650/51/52/53 4.0 detailed description 4.1 device overview the MCP1650/51/52/53 is a gated oscillator boost controller. by adding an external n-channel mosfet, schottky diode and boost inductor, high-output power applications can be achieved. the 750 khz hysteretic gated oscillator architecture enables the use of small, low-cost external components. by using a hysteretic approach, no compensation components are necessary for the stability of the regulator output. output voltage regulation is accomplished by comparing the output voltage (sensed through an external resistor divider) to a reference internal to the MCP1650/51/52/53. when the sensed output voltage is below the reference, the ext pin pulses the external n-channel mosfet on and off at the 750 khz gated oscillator fr equency. energy is stored in the boost inductor when the external n-channel mosfet is on and is delivered to the load through the external schottky diode when the mosfet is turned off. several pulses may be required to deliver enough energy to pump the output voltage above the upper hysteretic limit. once above the hysteretic limit, the internal oscillator is no longer gated to the ext pin and no energy is transferred from input to output. the peak current in the mosfet is sensed to limit its maximum value. as with all boost topology converters, even though the mosfet is turned off, there is still a dc path through the boost inductor and diode to the load. additional protection circuity, such as fuses, are recommended for short circuit protection. 4.2 input voltage the range of input voltage for the MCP1650/51/52/53 family of devices is specified from 2.7v to 5.5v. for the s-option devices, the undervoltage lockout (uvlo) feature will turn the boost controller off once the i nput voltage falls below 2.55v, typical. for the r-option devices, the uvlo is set to 2.0v. the r-option devices are recommended for use when ?bootstrapping? the output voltage back to the input. the input of the MCP1650/51/52/53 device is supplied by the output voltage during boost operation. this can be used to derive output voltages from input voltages that start up at approximately 2v (2-cell alkaline batteries). 4.3 fixed duty cycle the MCP1650/51/52/53 family utilizes a unique two- step maximum duty cycle architecture to minimize input peak current and improve output ripple voltage for wide input voltage operating ranges. when the input voltage is below 3.8v, the duty cycle is typically 80%. for input voltages above 3.8v, the duty cycle is typically 56%. by decreasing the duty cycle at higher input voltages, the input peak current is reduced. for low input voltages, a longer duty cycle stores more energy during the on- time of the boost mosfet. for applications that span the 3.8v input range, the inductor value should be selected to meet not only the minimum input voltage at 80% duty cycle, but 3.8v at 56% duty cycle as well. refer to section 5.0 ?application circuits/issues? for more information about selecting inductor values. 4.4 shutdown input operation the shdn pin is used to turn the MCP1650/51/52/53 on and off. when the shdn pin is tied low, the MCP1650/51/52/53 is off. when tied high, the MCP1650/51/52/53 will be enabled and begin boost operation as long as the input voltage is not below the uvlo threshold. 4.5 soft-start operation when power is first applied to the MCP1650/51/52/53, the internal reference initialization is controlled to slow down the start-up of the boost output voltage.this is done to reduce high inrush current required from the source. high inrush currents can cause the source voltage to drop suddenly and trip the uvlo threshold, shutting down the converter prior to it reaching steady- state operation. 4.6 gated oscillator architecture a 750 khz internal oscillator is used as the base frequency of the MCP1650/51/52/53. the oscillator duty cycle is typically 80% when the input voltage is below a nominal value of 3.8v, and 56% when the input voltage is above a nominal value of 3.8v. two duty cycles are provided to reduce the peak inductor current in applications where the input voltage varies over a wide range. high-peak inductor current results in undesirable high-output ripple voltages. for applications that have input voltage that cross this 3.8v boundary, both duty cycle conditions need to be examined to determine which one has the least amount of energy storage. refer to section 5.0 ?application circuits/issues? for more information about design considerations.
MCP1650/51/52/53 ds21876a-page 14 ? 2004 microchip technology inc. 4.7 fb pin the output voltage is fed back through a resistor divider to the fb pin. it is then compared to an internal 1.22v reference. when the divided-down output is below the internal reference, the internal oscillator is gated on and the ext pin pulses the external n-channel mosfet on and off to transfer energy from the source to the load at 750 khz. this will cause the output volt- age to rise until it is above the 1.22v threshold, thereby gating the internal oscillator off. hysteresis is provided within the comparator and is typically 12 mv. the rate at which the oscillator is gated on and off is determined by the input voltage, load current, hysteresis voltage and inductance. the output ripple voltage will vary depending on the input voltage, load current, hysteresis voltage and inductance. 4.8 pwm latch the gated oscillator is self-latched to prevent double and sporadic pulsing. the reset into the latch is asyn- chronous and can terminate the pulse during the on- time of the duty cycle. the reset can be accomplished by the feedback voltage comparator or the current limit comparator. 4.9 peak inductor current the external switch peak current is sensed on the cs pin across an optional external current sense resistor. if the cs pin falls more than 122 mv (typical) below v in , the current limit comparator is set and the pulse is terminated. this prevents the current from getting too high and damaging the n-channel mosfet. in the event of a short circuit, the switch current will be low due to the current limit. however, there is a dc path from the input through the inductor and external diode. this is true for all boost-derived topologies and addi- tional protection circuitry is necessary to prevent catastrophic damage. 4.10 ext output driver the ext output pin is designed to directly drive external n-channel mosfets and is capable of sourcing 400 ma (typical) and sinking 800 ma (typical) for fast on and off transitions. the top side of the ext driver is connected directly to v in , while the low side of the driver is tied to gnd, providing rail-to-rail drive capability. design flexibility is added by connecting an external resistor in series with the n-channel mosfet to control the speed of the turn on and off. by slowing the transition speed down, there will be less high- frequency noise. speeding the transition up produces higher efficiency. 4.11 low battery detect the low-battery detect (mcp1651 and mcp1653 only) feature can be used to determine when the lbi input voltage has fallen below a predetermined threshold. the low-battery detect comparator continuously monitors the voltage on the lbi pin. when the voltage on the lbi pin is above the 1.22v + 123 mv hysteresis, the lbo pin will be high-impedance (open- drain). when in the high-impedance state, the leakage current into the lbo pin is typically less than 0.1 a. as the voltage on the lbi pin decreases and is lower than the 1.22v typical threshold, the lbo pin will transition to a low state and is capable of sinking up to 10 ma. 123 mv of hysteresis is provided to prevent chattering of the lbo pin as a result of battery input impedance and boost input current. 4.12 power good output the power good output feature (mcp1652 and mcp1653 only) monitors the divided-down voltage feedback into the fb pin. when the output voltage falls more than 15% (typical) below the regulated set point, the power good (pg) output pin will transition from a high-impedance state (open-drain) to a low state capable of sinking 10 ma. if the output voltage rises more than 15% (typical) above the regulated set point, the pg output pin will transition from high to low. 4.13 device protection 4.13.1 overcurrent limit the current sense (cs) input pin is used to sense the peak input current of the boost converter. this can be used to limit how high the peak inductor current can reach. the current sense feature is optional and can be bypassed by connecting the v in input pin to the cs input pin. because of the path from input through the boost inductor and boost diode to output, the boost topology cannot support a short circuit without additional circuitry. this is typical of all boost regulators.
? 2004 microchip technology inc. ds21876a-page 15 MCP1650/51/52/53 5.0 application circuits/ issues 5.1 typical applications the MCP1650/51/52/53 boost controller can be used in several different configurations and in many different applications. for applications that require minimum space, low cost and high efficiency, the MCP1650/51/ 52/53 product family is a good choice. it can be used in boost, buck-boost, single-ended primary inductive converters (sepic), as well as in flyback converter topologies. 5.1.1 non-bootstrap boost applications non-bootstrap applications are typically used when the output voltage is boosted to a voltage that is higher than the rated voltage of the MCP1650/51/52/53. for non-bootstrap applications, the input voltage is connected to the boost inductor through the optional current sense resistor and the v in pin of the MCP1650/ 51/52/53. for this type of application, the s-option devices (uvlo at 2.55v, typical) should be used. the gated oscillator duty cycle will be dependant on the value of the voltage on v in . if v in > 3.8v, the duty cycle will be 56%. if v in < 3.8v, the duty cycle will be 80%. in non-bootstrap applications, output voltages of over 100v can be generated. even though the MCP1650/ 51/52/53 device is not connected to the high boost output voltage, the drain of the external mosfet and reverse voltage of the external schottky diode are connected. the output voltage capacitor must also be rated for the output voltage. figure 5-1: typical non-bootstrap application circuit (MCP1650/51/52/53). fb cs shdn v in 8 2 5 6 4 7 MCP1650 gnd input voltage 3.3v 10% c in 10 f off on ext boost inductor 3.3 h c out 10 f ceramic 90.9 k ? v out = 12v i out = 0 to 100 ma 10 k ? mosfet/schottky combination device r sense 0.05 ? 3.3v to 12v 100 ma boost converter 1 3 nc nc
MCP1650/51/52/53 ds21876a-page 16 ? 2004 microchip technology inc. 5.1.2 bootstrap boost applications for bootstrap configurations, the higher-regulated boost output voltage is used to power the MCP1650/ 51/52/53. this provides a constant higher voltage used to drive the external mosfet. the r-option devices (uvlo < 2.0v) can be used for applications that need to start up with the input voltage below 2.7v. for this type of application, the MCP1650/51/52/53 will start off of the lower 2.0v input and begin to boost the output up to its regulated value. as the output rises, so does the input voltage of the MCP1650/51/52/53. this provides a solution for 2-cell alkaline inputs for output voltages that are less than 6v. figure 5-2: bootstrap application circuit MCP1650/51/52/53. 5.1.3 sepic converter applications in many applications, the input voltage can vary above and below the regulated output voltage. a standard boost converter cannot be used when the output volt- age is below the input voltage. in this case, the MCP1650/51/52/53 can be used as a sepic controller. a sepic requires 2 inductors or a single coupled inductor, in addition to an ac coupling capacitor. as with the previous boost-converter applications, the sepic converter can be used in either a bootstrap or non-bootstrap configuration. the sepic converter can be a very popular topology for driving high-power leds. for many leds, the forward voltage drop is approximately 3.6v, which is between the maximum and minimum voltage range of a single-cell li-ion battery, as well as 3 alkaline or nickel metal batteries. figure 5-3: sepic converter application circuit mcp 1650/51/52/53. fb cs shdn v in 8 2 5 6 4 7 mcp1652 gnd input voltage 2.8v to 4.2v c in 47 f off on ext 3.3 h 3.09 k ? vout = 5v iout = 1a 1k ? li-ion input to 5.0v 1a regulated output (bootstrap) with mcp1652 power good output 1 3 nc pg 0.1 f 10 ? power good output c out 47 f ceramic 0.1 ? shutdown n-channel mosfet schottky diode fb cs shdn v in 8 2 5 6 4 7 mcp1651 gnd input voltage 2.8v to 4.2v c in 47 f off on ext 3.3 h 2.49 k ? i out = 1a 1k ? li-ion input to 3.6v 3w led driver (sepic converter) 1 3 nc pg 0.1 f 10 ? power good output 4.7 f 3.3 h 0.2 ? c out 47 f ceramic 0.1 ? 3w led dimming capability schottky diode n-channel mosfet
? 2004 microchip technology inc. ds21876a-page 17 MCP1650/51/52/53 5.2 design considerations when developing switching power converter circuits, there are numerous things to consider and the MCP1650/51/52/53 family is no exception. the gated oscillator architecture does provide a simple control approach so that stab ilizing the regulator output is an easier task than that of a fixed-frequency regulator. the MCP1650/51/52/53 controller utilizes an external switch and diode allowing for a very wide range of conversion (high voltage gain and/or high current gain). there are practical, as well as power-conversion, topology limitations. the MCP1650/51/52/53 gated oscillator hysteretic mode converter has similar limitations, as do fixed-frequency boost converters. 5.2.1 design example setting the output voltage: by adjusting the external resistor divider, the output voltage of the boost converter can be set to the desired value. due to the rc delay caused by the resistor divider and the device input capacitance, resistor values greater than 100 k ? are not recommended. the feedback voltage is typically 1.22v. for this example: 5.2.1.1 calculations for gated oscillator hysteretic designs, the switching frequency is not constant and will gate several pulses to raise the output voltage. once the upper hysteresis threshold is reached, the gated pulses stop and the output will coast down at a rate determined by the out- put capacitor and the load. using the gated oscillator switching frequency and duty cycle, it is possible to determine what the maximum boost ratio is for continuous inductor current operation. this relationship assumes that the output load current is significant and the boost converter is operating in continuous inductor current mode. if the load is very light or a small boost inductance is used, higher boost ratio?s can be achieved. calculate at minimum v in : the ideal maximum output voltage is 14v. the actual measured result will be less due to the forward voltage drop in the boost diode, as well as other circuit losses. for applications where the input voltage is above and below 3.8v, another point must be checked to deter- mine the maximum boost ratio. at 3.8v, the duty cycle changes from 80% to 56% to minimize the peak current in the inductor. for this case, v outmax = 8.63v less than the required 12v output specified. the size of the inductor has to decrease in order to operate the boost regulator in discontinuous inductor current mode. input voltage = 2.8v to 4.2v output voltage = 12v output current = 100 ma oscillator frequency = 750 khz duty cycle = 80% for v in < 3.8v duty cycle = 56% for v in > 3.8v r bot =10k ? v out = 12v v fb = 1.22v r top = 88.4 k ? 90.9 k ? was selected as the closest standard value. r top r bot v out v fb ------------- ?? ?? 1 ? ?? ?? = where: r top = top resistor value r bot = bottom resistor value p out v out i out = where: p out = 12v x 100 ma p out = 1.2 watts p in p out efficiency () ? = where: p in = 1.2w/80% p in = 1.5 watts (80% is a good efficiency estimate) v out 1 1d ? ------------ - ?? ?? v in = v outmax 1 10.8 ? --------------- - ?? ?? 2.8 = v outmax 1 10.56 ? ------------------ - ?? ?? 3.8 =
MCP1650/51/52/53 ds21876a-page 18 ? 2004 microchip technology inc. to determine the maximum inductance for discontinuous operating mode, multiply the energy going into the inductor every switching cycle by the number of cycles per second (switching frequency). this number must be greater than the maximum input power. the equation for the energy flowing into the inductor is given below. the input power to the system is equal to energy times time. the inductor peak current is calculated using the equation below: using a typical inductance of 3.3 h, the peak current in the inductor is calculated below: at 3.8v and below, the converter can boost to 14v while operating in the continuous mode. for this example, a 3.3 h inductor is too large, a 2.2 h inductor is selected. as the inductance is lowered, the peak current drawn from the input at all loads is increased. the best choice of inductance for high boost ratios is the maximum inductance value necessary while maintaining discontinuous operation. for lower boost-ratio applications (3.3v to 5.0v), a 3.3 h inductor or larger is recommended. in these cases, the inductor operates in continuous current mode. 5.2.2 mosfet selection there are a couple of key consideration?s when selecting the proper mosfet for the boost design. a low r dson logic-level n-channel mosfet is recommended. 5.2.2.1 mosfet selection process. 1. voltage rating - the mosfet drain-to-source voltage must be rated for a minimum of v out + v fd of the external boost diode. for example, in the 12v output converter, a mosfet drain-to- source voltage rating of 12v + 0.5v is necessary. typically, a 20v part can be used for 12v outputs. 2. logic-level r dson - the mosfet carries significant current during the boost cycle on time. during this time, the peak current in the mosfet can get quite high. in this example, a sot-23 mosfet was used with the following ratings: selecting mosfets with lower r dson is not always better or more efficient. lower r dson typically results in higher total gate charge and input capacitance, slow- ing the transition time of the mosfet and resulting in increased switching losses. 5.2.3 diode selection the external boost diode also switches on and off at the switching frequency and requires very fast turn-on and turn-off times. for most applications, schottky diodes are recommended. the voltage rating of the schottky diode must be rated for maximum boost output voltage. for example, 12v output boost converter, the diode should be rated for 12v plus margin. a 20v or 30v schottky diode is recommended for a 12v output appli- cation. schottky diodes also have low forward-drop characteristics, another desired feature for switching power supply applications. f sw = 750 khz t on =(1/f sw * duty cycle) i pk (2.8v) = 905 ma energy (2.8v) = 1.35 -joules power (2.8v) = 1.01 watts i pk (3.8v) = 860 ma energy at 3.8v = 1.22 -joules power = 0.914 watts f sw = 750 khz t on =(1/f sw * duty cycle) i pk (2.8v) = 1.36a energy (2.8v) = 2.02 -joules power (2.8v) = 1.52 watts i pk (3.8v) = 1.29a energy at 3.8v = 1.83 -joules power = 1.4 watts energy 1 2 -- - li pk 2 = i pk v in l -------- t on = irlm2502 n-channel mosfet v bds = 20v (drain source breakdown voltage) r dson = 50 milli-ohms (v gs = 2.5v) r dson = 35 milli-ohms (v gs = 5.0v) q g = total gate charge = 8 nc v gs = 0.6v to 1.2v (gate source threshold voltage)
? 2004 microchip technology inc. ds21876a-page 19 MCP1650/51/52/53 5.2.4 input/output capacitor selection there are no special requirements on the input or output capacitor. for most applications, ceramic capacitors or low effective series resistance (esr) tan- talum capacitors will provide lower output ripple voltage than aluminum electrolytic. care must be taken not to exceed the manufacturer?s rated voltage or ripple cur- rent specifications. low-value capacitors are desired because of cost and size, but typically result in higher output ripple voltage. the input capacitor size is dependant on the source impedance of the application. the hysteretic architecture of the MCP1650/51/52/53 boost converter can draw relatively high input current peaks at certain line and load conditions. small input capacitors can produce a large ripple voltage at the input of the converter, resulting in unsatisfactory performance. the output capacitor plays a very important role in the performance of the hysteretic gated oscillator converter. in some cases, using ceramic capacitors can result in higher output ripple voltage. this is a result of the low esr that ceramic capacitors exhibit. as shown in the application schematics, 100 milli-ohms of esr in series with the ceramic capacitor will actually reduce the output ripple voltage and peak input cur- rents for some applications. the selection of the capac- itor and esr will largely determine the output ripple voltage. 5.2.5 low battery detection for low battery detection, the mcp1651 or mcp1653 device should be used. the low-battery detect feature compares the low battery input (lbi) pin to the internal 1.22v reference. if the lbi input is below the lbi threshold voltage, the low battery output (lbo ) pin will sink current (up to 10 ma) through the internal open- drain mosfet. if the lbi input voltage is above the lbi threshold, the lbo output pin will be open or high impedance. 5.2.6 power good output for power good detection, the mcp1652 or mcp1653 device is ideal. the power good feature compares the voltage on fb pin to the internal reference (15%). if the fb pin is more than 15% above or below the power good threshold, the pg output will sink current through the internal open-drain mosfet. if the output of the regulator is within 15% of the output voltage, the pg pin will be open or high-impedance. 5.2.7 external component manufactures inductors: sumida ? corporation http://www.sumida.com/ coilcraft ? http://www.coilcraft.com bh electronics ? http://www.bhelectronics.com pulse engineering ? http://www.pulseeng.com/ coiltronics ? http://www.cooperet.com/ capacitors murata ? http://www.murata.com/ kemet ? http://www.kemet.com/ taiyo-yuden http://www.taiyo-yuden.com/ avx ? http://www.avx.com/ mosfets and diodes: international rectifier http://www.irf.com/ vishay ? /siliconix http://www.vishay.com/com- pany/brands/siliconix/ on semiconductor ? http://www.onsemi.com/ fairchild semiconductor ? http://www.fairchildsemi.com/
MCP1650/51/52/53 ds21876a-page 20 ? 2004 microchip technology inc. 6.0 typical layout figure 6-1: MCP1650/51/52/53 application schematic. when designing the physical layout for the MCP1650/ 51/52/53, the highest priority should be placing the boost power train components in order to minimize the size of the high current paths. it is also important to pro- vide ground-path separation between the large-signal power train ground and the small signal feedback path and feature grounds. in some cases, additional filtering on the v in pin is helpful to minimize MCP1650/51/52/53 input noise. in this layout example, the critical power train paths are from input to output, +v in _ 1 to f 1 to c 2 to l 1 to q 1 to gnd. current will flow in this path when the switch (q 1 ) is turned on. when q 1 is turned off, the path for current flow will quickly change to +v in _ 1 to f 1 to l 1 to d 1 to c 1 to r4 to gnd. when starting the layout for this appli- cation, both of these power train paths should be as short as possible. the c 2 , q 1 and r 4 gnd connections should all be connected to a single ?power ground? plane to minimize any wiring inductance. bold traces are used to represent high-current connections and should be made as wide as is practical. r 1 and c 3 is an optional filter that reduces the switching noise on the v in pin of the MCP1650/51/52/ 53. this should be considered for high-power applications (> 1w) and bootstrap applications where v in of the MCP1650/51/52/53 is supplied by the output voltage of the boost regulator. the feedback resistor divider that sets the output voltage should be considered sensitive and be routed away from the power-switching components discussed previously. as shown in the diagram, r 6 , r 8 and the gnd pin of the MCP1650/51/52/53 should be returned to an analog ground plane. the analog ground plane and power ground plane should be connected at a single point close to the input capacitor (c 2 ). single-cell li-ion input (2.8v to 4.8v) +5v output @ 1a low input coilcraft ? do1813hc pgnd pgnd pgnd agnd agnd c3 0.1 c2 47 tp1 +v in _1 tp2 +v out _1 tp4 gnd r5 73.2k r8 49.9k agnd agnd vr vr 0 0 0 0 0 0 0 d1 3.3 h b330adic l1 r3 3.09k r7 562 r6 1k mcp1651_msop 3 1 4 2 5 6 7 8 d2 led f1 mcp1651r (+2.8v to +4.8v input to +5v output @ 1a) 2a power train path q1 irlml2502 /shdn lbi gnd cs ext fb /lbo v in r2 49.9k keep awa y from switchin g section tp5 /shdn1 r4 0.1 tp3 gnd c1 47 fuse r1 100
? 2004 microchip technology inc. ds21876a-page 21 MCP1650/51/52/53 figure 6-2 represents the top wiring for the MCP1650/ 51/52/53 application shown. as shown in figure 6-2, the high-current wiring is short and wide. in this example, a 1 oz. copper layer is used for both the top and bottom layers. the ground plane connected to c2 and r4 are connected through the vias (holes) connecting the top and bottom layer. the feedback signal (from tp2) is wired from the output of the regulator around the high current switching section to the feedback voltage divider and to the fb pin of the MCP1650/51/52/53. figure 6-2: top layer wiring. figure 6-3 represents the bottom wiring for the MCP1650/51/52/53 application shown. silk-screen reference designator labels are transparent from the top of the board. the analog ground plane and power ground plane are connected near the ground connection of the input capacitor (c 2 ). this prevents high-power, ground-circulating currents from flowing through the analog ground plane. figure 6-3: bottom layer wiring.
MCP1650/51/52/53 ds21876a-page 22 ? 2004 microchip technology inc. 7.0 packaging information 7.1 package marking information legend: xx...x customer specific information* yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information. * standard marking consists of microchip part number, year code, week code, and traceab ility code. 8-lead msop ( MCP1650, mcp1651, mcp1652 ) example: xxxxx ywwnnn 1650se 0448256 10-lead msop ( mcp1653 ) example: xxxxx yywwnnn 1653se 0448256
? 2004 microchip technology inc. ds21876a-page 23 MCP1650/51/52/53 8-lead plastic micro small outline package (ua) (msop) d a a1 l c (f) a2 e1 e p b n 1 2 dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not .037 ref f footprint (reference) exceed .010" (0.254mm) per side. notes: drawing no. c04-111 *controlling parameter mold draft angle top mold draft angle bottom foot angle lead width lead thickness c b .003 .009 .006 .012 dimension limits overall height molded package thickness molded package width overall length foot length standoff overall width number of pins pitch a l e1 d a1 e a2 .016 .024 .118 bsc .118 bsc .000 .030 .193 typ. .033 min p n units .026 bsc nom 8 inches 0.95 ref - - .009 .016 0.08 0.22 0 0.23 0.40 8 millimeters* 0.65 bsc 0.85 3.00 bsc 3.00 bsc 0.60 4.90 bsc .043 .031 .037 .006 0.40 0.00 0.75 min max nom 1.10 0.80 0.15 0.95 max 8 -- - 15 5 - 15 5 - jedec equivalent: mo-187 0 - 8 5 5 - - 15 15 - - - -
MCP1650/51/52/53 ds21876a-page 24 ? 2004 microchip technology inc. 10-lead plastic micro small outline package (un) (msop) dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not .037 ref f footprint exceed .010" (0.254mm) per side. notes: drawing no. c04-021 *controlling parameter mold draft angle top mold draft angle bottom foot angle lead width lead thickness c b .003 .006 - .009 dimension limits overall height molded package thickness molded package width overall length foot length standoff overall width number of pins pitch a l e1 d a1 e a2 .016 .024 .118 bsc .118 bsc .000 .030 .193 bsc .033 min p n units .020 typ nom 10 inches 0.95 ref - 0.23 .009 .012 0.08 0.15 - - 0.23 0.30 millimeters* 0.50 typ. 0.85 3.00 bsc 3.00 bsc 0.60 4.90 bsc .043 .031 .037 .006 0.40 0.00 0.75 min max nom 1.10 0.80 0.15 0.95 max 10 5 15 5 15 - -- 0 - 8 5 - 5 - 15 15 jedec equivalent: mo-187 8 0 e l d (f) b p e1 n a2 1 2 c a1 a l1 - - --
? 2004 microchip technology inc. ds21876a-page 25 MCP1650/51/52/53 product identification system to order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office . sales and support device MCP1650: 750 khz boost controller mcp1651: 750 khz boost controller mcp1652: 750 khz boost controller mcp1653: 750 khz boost controller uvlo options r = 2.0v s = 2.55v temperature range e = -40 c to +125 c package ms = plastic micro small outline (msop), 8-lead un = plastic micro small outline (msop), 10-lead part no. x xx package temperature range device x uvlo options examples: a) MCP1650r-e/ms: 2.0v option b) MCP1650rt-e/ms: 2.0v option, tape and reel c) MCP1650s-e/ms: 2.55v option d) MCP1650st-e/ms: 2.55v option, tape and reel a) mcp1651r-e/ms: 2.0v option b) mcp1651rt-e/ms: 2.0v option, tape and reel c) mcp1651s-e/ms: 2.55v option d) mcp1651st-e/ms: 2.55v option, tape and reel a) mcp1652r-e/ms: 2.0v option b) mcp1652rt-e/ms: 2.0v option, tape and reel c) mcp1652s-e/ms: 2.55v option d) mcp1652st-e/ms: 2.55v option, tape and reel a) mcp1653r-e/un: 2.0v option b) mcp1653rt-e/un: 2.0v option, tape and reel c) mcp1653s-e/un: 2.55v option d) mcp1653st-e/un: 2.55v option, tape and reel data sheets products supported by a preliminary data sheet may have an errata sheet describing minor operational differences and recommended workarounds. to determine if an errata sheet exists for a particular device, please contact one of the following: 1. your local microchip sales office 2. the microchip corporate literature center u.s. fax: (480) 792-7277 3. the microchip worldwide site (www.microchip.com) please specify which device, revision of silicon and data sheet (include literature #) you are using. customer notification system register on our web site (www.microchip.com/cn) to receive the most current information on our products.
MCP1650/51/52/53 ds21876a-page 26 ? 2004 microchip technology inc. notes:
? 2004 microchip technology inc. ds21876a-page 27 information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. no representation or warranty is given and no liability is assumed by microchip technology incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. use of microchip?s products as critical components in life support systems is not authorized except with express written approval by microchip. no licenses are conveyed, implicitly or otherwise, under any intellectual property rights. trademarks the microchip name and logo, the microchip logo, accuron, dspic, k ee l oq , mplab, pic, picmicro, picstart, pro mate, powersmart and rfpic are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. amplab, filterlab, micro id , mxdev, mxlab, picmaster, seeval, smartshunt and the embedded control solutions company are registered trademarks of microchip technology incorporated in the u.s.a. application maestro, dspicdem, dspicdem.net, dspicworks, ecan, economonitor, fansense, flexrom, fuzzylab, in-circuit serial programming, icsp, icepic, migratable memory, mpasm, mplib, mplink, mpsim, pickit, picdem, picdem.net, pictail, powercal, powerinfo, powermate, powertool, rflab, select mode, smartsensor, smarttel and total endurance are trademarks of microchip technology incorporated in the u.s.a. and other countries. serialized quick turn programming (sqtp) is a service mark of microchip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2004, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. note the following details of the code protection feature on microchip devices: ? microchip products meet the specification contained in their particular microchip data sheet. ? microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip products in a manner outside the operating specifications contained in microchip's data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconductor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are committed to continuously improving the code protection features of our products. attempts to break microchip?s code protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2002 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona and mountain view, california in october 2003. the company?s quality system processes and procedures are for its picmicro ? 8-bit mcus, k ee l oq ? code hopping devices, serial eeproms, microperipherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified.
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